Multi-label offset lifting method

ABSTRACT

A method for generating a code, a method for encoding and decoding data, and an encoder and a decoder performing the encoding and decoding are disclosed. In an embodiment, a method for lifting a child code from a base code for encoding and decoding data includes determining a single combination of a circulant size, a lifting function, and a labelled base matrix PCM according to an information length and a code rate using data stored in a lifting table. The lifting table was defined at a code generation stage. The method also includes calculating a plurality of shifts for the child code. Each shift is calculated by applying the lifting function to the labelled base matrix PCM with a defined index using the circulant size and using the derived child PCM to encode or decode data.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application No. 62/500,370, filed on May 2, 2017, which application is hereby incorporated herein by reference.

TECHNICAL FIELD

The present application relates to data storage and communication technologies, in particular to methods and systems for encoding and decoding data using parity check codes.

BACKGROUND

Parity checking codes are used to facilitate the recovery of stored data as well as data transmitted through a communications channel. One type of parity check code is known as Low-Density-Parity-Check (LDPC), which is characterized by a sparse Parity Check Matrix (PCM), i.e., a PCM having a low percentage of 1's. An LDPC encoder at a transmitter is used for encoding source words to generate code words. An LDPC decoder at a receiver is used for decoding the received code words. LDPC codes of various rates are being widely adopted, or considered for adoption, in data storage and wireless communications technologies and standards such as those relating to IEEE 802.11 and 5G.

Almost all LDPC codes used in practice are quasi-cyclic (QC) LDPC with QC parity-check matrices, in which a quasi-cyclic identity matrix can be combined with an array of shift information (i.e., QC shift PCM) to define an expanded QC PCM (e.g., a QC LDPC PCM). QC LDPC encoding and recovery algorithms and the storage of PCM information can consume hardware resources, and accordingly there is a need for methods, systems, and technologies that improve the efficiency of and reduce the hardware resources required for QC LDPC coding systems.

SUMMARY

An embodiment of the disclosure provides a method for lifting a child code from a base code for encoding and decoding data. The method includes determining a single combination of a circulant size, a lifting function, and a labelled base matrix PCM according to an information length and a code rate using data stored in a lifting table. The lifting table was defined at a code generation stage. The method also includes calculating a plurality of shifts for the child code. Each shift is calculated by applying the lifting function to the labelled base matrix PCM with a defined index using the circulant size and using the derived child PCM to encode or decode data. The method also includes deriving a child PCM according to the single combination of the circulant size, the lifting function, and the labeled PCM and according to one of the plurality of shifts for the child code. The method also includes using the derived child PCM to encode or decode data.

An embodiment of the disclosure provides a method for generating a code. The method includes determining an allowed subset of lift sizes Z for each coding rate R and each information length K. The method also includes determining at least one lifting functions f_(i) for each code rate R and each allowed Z. The method also includes determining a set of base PCMs describing a single protograph. The base PCMs are based on coding rates R and allowed Zs. The method also includes selecting a single combination of a lift size Z, a lifting function f_(i) and a base PCM_(t). The method also includes storing a circulant size offset and/or a circulant size index, a lifting function index, and a base code index corresponding to the single combination for each information length and each coding rate.

An embodiment of the disclosure provides a method for operating a device at a transmitting side. The method includes encoding, at an encoder, information bits into code word. The method also includes transmitting, at a transmitter, signals to a receiving side. The signals including the code words. The information bits are encoded using a plurality of labelled base PCMs. The labelled base PCMs are derived from a single base PCM describing a single protograph.

An embodiment of the disclosure provides a method for operating a device at a receiving side. The method includes receiving, at a receiver, signals from a transmitting side. The signals include a code words. The method also includes decoding, at a decoder, the code words by applying extracting information bits. The information bits are decoded using a plurality of labelled base PCMs. The labelled base PCMs are derived from a single base PCM describing a single protograph.

An embodiment of the disclosure provides an encoder or decoder. The encoder or decoder includes a processor and a computer readable storage medium storing programming for execution by the processor. The programming includes instructions to determine a single combination of a circulant size, a lifting function and a labelled PCM according to an information length and a code rate using data stored in a lifting table which was defined at a code generation stage. The programming also includes instructions to calculate a plurality of shifts for the child code, wherein each shift is calculated by applying the lifting function to the labelled PCM with a defined index using the circulant size. The programming also includes instructions to derive a child PCM according to the single combination of the circulant size, the lifting function, and the labeled PCM and according to one of the plurality of shifts for the child code. The programming also includes instructions to use the derived child PCM to encode or decode data.

In one or more aspects of the disclosure, shifts of non-zero circulants for predefined positions are unchanged.

In one or more aspects of the disclosure, the lifting function is selected from a single lifting function.

In one or more aspects of the disclosure, the lifting function is selected from a plurality of lifting functions.

In one or more aspects of the disclosure, the labelled base matrix PCM is directly derived from the circulant size.

In one or more aspects of the disclosure, the circulant size is Z, where Z=a*2{circumflex over ( )}s.

In one or more aspects of the disclosure, the lifting function provides a code shift value.

In one or more aspects of the disclosure, the information bits have different bit lengths and are encoded with different coding rates.

In one or more aspects of the disclosure, a labelled base PCM is selected according to a coding rate.

In one or more aspects of the disclosure, encoding includes switching from a first labelled PCM to a second labelled PCM when the coding rate changes from a first coding rate to a second coding rate.

In one or more aspects of the disclosure, encoding includes switching from a first labelled PCM to a second labelled PCM when the lift size changes from a first lift size to a second lift size, the first and second lift sizes being dependent on different information bit lengths.

In one or more aspects of the disclosure, decoding includes switching from a first labelled PCM to a second labelled PCM when the coding rate changes from a first coding rate to a second coding rate.

In one or more aspects of the disclosure, decoding includes switching from a first labelled PCM to a second labelled PCM when the lift size changes from a first lift size to a second lift size, the first and second lift sizes being dependent on different information bit lengths.

In one or more embodiments, high performance is achieved by providing a rate adaptive code (switching from one code rate to another code rate), by providing an information length adaptive code, or by providing a combination of a rate adaptive and a length adaptive code. Further embodiments provide simple hardware based on these embodiments. One or more disclosed embodiments rely on a few coding schemes (PCM matrices) that are flexible with respect to coding rate and information length. This has the advantage that the embodiments provide substantially optimal performance in varying situations while also saving storage space.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the present disclosure, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a diagram showing a 3 by 6 parity check matrix (PCM), H, and its corresponding Tanner graph representation;

FIG. 2 is a diagram showing a 4 by 6 PCM, H, and its corresponding Tanner graph representation;

FIG. 3 shows a flow chart 300 for constructing a lifting table T;

FIGS. 4A-4C show examples of possible lifting tables T;

FIGS. 5A, 5B-1, and 5B-2 show an example of a first base graph or protograph;

FIGS. 6A, 6B-1-6B-4, 7A, 7B-1-7B-4, 8A, 8B-1-8B-4, 9A, 9B-1-9B-4, 10A, 10B-1-10B-4, 11A, 11B-1-11B-4, 12A, 12B-1-12B-2, 13A, and 13B-1-13B-3 show embodiments of specific labelled first graphs;

FIGS. 14A-1-14A-2, and 14B-1-14B-3 show an example of a second base graph or protograph;

FIGS. 15A, 15B-1-15B-3, 16A, 16B-1-16B-3, 17A, 17B-1-17B-3, 18A, 18B-1-18B-3, 19A, 19B-1-19B-3, 20A, 20B-1-20B-3, 21A, 21B-1-21B-3, 22A, 22B-1-22B-3, 23A, and 23B-1-23B-3 show embodiments of a singled labeled second graph;

FIGS. 24A-1-24A-6 and 24B-1-24B-3 show embodiments of lifting tables T for the first graph;

FIGS. 24C-1-24C-6 and 24D-1-24D-6 show embodiments of lifting tables T for the second graph;

FIGS. 25A-25D show the performance improvement of a decoder applying lifting tables T1 and T2 for different information length and different coding rates R;

FIG. 26 is a block diagram of an embodiment of a LDPC encoder;

FIG. 27 is a block diagram of an embodiment of an LDPC decoder;

FIG. 28 is a flowchart of an embodiment of a method for encoding data using LDPC, the disclosed lifting tables, and the disclosed lifting functions;

FIG. 29 is a flowchart of an embodiment of a method for decoding data using LDPC, the disclosed lifting tables, and the disclosed lifting functions;

FIG. 30 illustrates a block diagram of an embodiment processing system for performing methods described herein, which may be installed in a host device;

FIG. 31 illustrates a block diagram of a transceiver adapted to transmit and receive signaling over a telecommunications network; and

FIG. 32 illustrates an embodiment network for communicating data in which the disclosed methods and systems may be implemented.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present disclosure provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the disclosure, and do not limit the scope of the disclosure.

Disclosed herein are systems, methods, and devices for encoding/decoding data using LDPC. Various embodiments include offset lifting procedures to determine a circulant offset to encode/decode data. Furthermore, various embodiments include non-sequential circulant offsets and larger circulant offsets than the prior art. Various embodiments also include multiple lifting functions. Having large circulant offsets allows the best offset to be determined more quickly and consumes fewer system resources than the prior art methods (e.g., less amount of offline simulations during lifting table construction, less memory needed to store the lifting table in the encoder/decoder, etc.). Furthermore, different lifting functions may be better suited for encoding different length code words.

Embodiments of the disclosure further provide a flexible method for allocating good codes (or matrices) when information length size K and coding rate R change (over time). Various embodiments provide a coding method capable for switching between different selected allowed lift values Z and different labeled PCMs for the same protograph. Various other embodiments provide a method capable of switching between different PCMs based on a coding rate R and a lift value Z. Further embodiments provide lifting tables for various ranges of coding rates R and information length K. This resulting code is advantageous because it provides a lift value and a labeled PCM for a given information length size K and a coding rate R.

The high performance may be achieved by providing a rate adaptive code (switching from one code rate to another code rate), by providing an information length adaptive code, or by providing a combination of a rate adaptive and a length adaptive code. Further embodiments provide simple hardware based on these embodiments.

These embodiments rely on a few coding schemes (PCM matrices) that are flexible with respect to coding rate and information length. This has the advantage that the embodiments provide optimal performance in every situation while saving storage space.

FIG. 1 is a diagram 100 showing a 3 by 6 parity check matrix (PCM), H, 102 and its corresponding Tanner graph representation 104. An LDPC code is defined by a sparse parity check matrix (PCM), which is an (N−K) row by N column matrix, where N is the codeword size (number of bits in a codeword) and K is the information block size of a source word (number of message bits in each codeword). A Tanner graph 104 is a graphical representation of the parity check matrix specifying the parity check equations. In the depicted example, the Tanner graph 104 includes three check nodes (CNs) c₁, c₂, and c₃ and six variable nodes (VNs) v₁, v₂, v₃, v₄, v₅, and v₆. A Tanner graph consists of N variable nodes (VNs) and M check nodes (CNs). In the depicted example, the Tanner graph 104 includes three CNs c₁, c₂, and c₃ and six VNs v₁, v₂, v₃, v₄, v₅, and v₆. In the Tanner graph 104 shown in FIG. 1, the m^(th) check node is connected to the n^(th) variable node if, and only if, the n^(th) element, h_(mn), in the m^(th) row in the parity check matrix, H, is 1.

FIG. 2 is a diagram 200 showing a 4 by 6 PCM, H, 202 and its corresponding Tanner graph representation 204. A receiving entity can decode received code words that have been encoded in accordance with PCM H by applying the PCM H in combination with a message passing algorithm (MPA). As illustrated in the example of FIG. 2, LDPC decoding with MPA is an iterative decoding algorithm that uses the structure of the Tanner graph 204. In an LDPC decoder, each m^(th) check node (C₁, C₂, C₃) is connected to the n^(th) variable node (V₁, . . . , V₆) if and only if the n^(th) element h_(mn) in the m^(th) row in the PCM H is 1.

For practical application, PCMs are typically configured as a more structured matrix rather than a simple collection of binary ones and zeros. For example, a more structured matrix is used to support a type of LDPC codes referred to as Quasi-Cyclic (QC) LDPC that are produced by cyclic permutation matrices with column weight 1. In particular, as shown in FIG. 2, LDPC PCM H can be partitioned into a set of square sub-matrices P_(i) of size Z×Z that are either cyclic-permutations of an identity matrix P_(o) or null submatrices with all zero entries. The matrix dimension Z of the QC sub-matrix is referred to as the circulant size and is also known as a lifting factor. The identity matrix P_(o) has “1” entries on the diagonal from the top left corner to the bottom right corner and “o” entries everywhere else. An index value i can be used to denote the cyclic-permutation submatrix P_(i) obtained from the Z×Z identity matrix P_(o) by cyclically shifting the columns to the right by i elements. By way of example, FIG. 2 illustrates 4 by 6 LDPC PCM H partitioned into a set of 2 by 2 square submatrices. The submatrix P_(o) is an identity matrix, and submatrix P₁ is obtained by cyclically shifting the columns of submatrix P_(o) to the right by 1. QC LDPC allows large PCMs to be represented as smaller structured PCMs with each Z×Z submatrix represented by its index value i in a corresponding cell location of a QC PCM. By way of example, in FIG. 2, the 4 by 6 PCM H can be restated as (and thus generated from) a 2 by 3 QC PCM H_(c) in which each cell includes with an cyclic shift index value or a null value. As used herein, H may be referred to as a protograph of the code (i.e., protograph matrix). Converting from H to H_(c) is typically referred to as “edge labeling” or simply “labeling.” Also, as used herein, H_(c) may be referred to as a labelled protograph or a labelled matrix.

QC LDPC codes are usually decoded by a message passing decoder such as BP, Min-Sum, and their modifications (NMSA, OMSA, . . . ). Performance of the QC LDPC code depends on multiple factors like row and column weight distribution (typically optimized using Density evolution methods), code distance, amount of short cycles and trapping sets etc. However, prior art encoding/decoding systems and algorithms and storage of the PCM information consume large amounts of system resources.

Additionally, to support information length fine granularity and rate adaption, nested family of the codes may be used, where rate R adaption and length K adaption is performed by puncturing (removing) parity bits and shortening (zero-padding) information bits. Accordingly, a simple and powerful method is needed to construct child PCMs from every (labelled) base PCM.

Nested means adjusting the code for code rate R adaption by puncturing (removing) parity bits. The PCM itself corresponds to a lower or the lowest code. If one or few columns (either circulant columns or bit columns) are removed (punctured) from the right and the same amount of rows are removed from the bottom of PCM, the PCM still can be used for decoding/encoding, but the coding rate R has changed (increased). This procedure can be performed step-by step until a smallest possible PCM (called the “core” PCM corresponding to the highest rate) is identified. Accordingly, the PCM is actually a comprehensive code comprising a set of nested codes. These are called “nested” subcodes of the code, which corresponds to the nested subgraphs of the main (biggest) graph of the code.

Switching between rates is done by switching from one subcode to another one. If incremental retransmission of the additional parity bits is needed (meaning switching from one nested subcode (equivalent to a “smaller” PCM) to another (nested) subcode (equivalent to a “larger” PCM (meaning the code has a lower rate)), the lifting method may not be changed (or, in other embodiments, are not allowed to be changed). Thus, lifting tables may be shared for these subcodes.

As noted above, storage and use of QC PCM information can be resource intensive. Accordingly, embodiments of the present disclosure provide a QC PCM method and system that allows the same QC PCM information to be adaptively used to support a range of different information rates R and information block sizes K. Accordingly, methods and systems are disclosed herein that relate to shortening, puncturing and lifting QC LDPC codes. Shortening means padding information bits with zeros to match exactly the given rate (these bits are not transmitted but used by both encoder and decoder as zeros). Shortened bits may be padded from the left, the right side of the information block, or even from somewhere in the middle. Puncturing means removing some non-needed parity check bits to increase the rate of the code. This corresponds to cutting the last several columns and the same number of rows from the PCM.

To support information length fine granularity and rate adaption, nested family of the codes may be used, where rate and length adaption is performed by puncturing parity bits and shortening information bits. Accordingly, simple and powerful lifting methods are described herein to construct child PCMs from several base PCMs.

FIG. 3 shows a flow chart 300 for constructing a powerful parity check code. In particular, the code is a rate adaptive code. A base PCM corresponds to the lowest code rate. By removing or puncturing one or few columns from the right and the same amount of rows from the bottom of the base PCM, the code rate changes, i.e., increases. Based on this (e.g., a step-by-step procedure) a smallest possible PCM (called the “core” PCM) for a high code rate can be identified. Accordingly, a base PCM represents a set of codes.

In a first step, at 302, a subset Z_(i) of a plurality of allowed lift sizes Z is determined for each coding rate R and each information length K. First, a minimum lift size is calculated Z_(orig)=K/K_(b), wherein k is the number of information bits and K_(b) is the number of information columns in the protograph. K_(b) is typically fixed for a specific hardware device such as a decoder or encoder. K_(b) may be 10, 16 or 22. K_(b) may have other values in the teens or twenties. K_(b) may be the same for all base PCMs and all labelled PCMs. Second, a set of allowed Z, Z_(allowed), is determined, wherein Z_(allowed)≥Z_(orig). The allowed values of Z may be a predefined fixed set of allowed values Z of the form of a*2^(s), wherein a is a positive integer and s is a non-negative integer. Moreover, a range of values for a and for s or for pairs (a, s) may be specified. For example, if a ε {1, 2, . . . , 16}, s ε {0, 1, 2, . . . , 256} and Z=a*2^(s), Z may be limited to be not less than 8 and not larger than 384 then the Z_(allowed) may be: Z _(allowed)={8:1:16}∪{16:2:32}∪{32:4:64}∪{64:8:128}∪{128:16:256}∪{256:32:384}.

Third, a subset m of the allowed lift sizes Z_(allowed) is selected. In an embodiment, the subset m may be the lowest m numbers of Z_(allowed) such that Z≥Z_(orig). In an alternative embodiment, the subset m of the allowed lift sizes, Z_(allowed), may be the lowest m options for Z such that K_(b)≤K_(bmax) and Z≥Z_(orig). Here, K_(b) is the number of information QC-columns in the PCM that are not shortened and K_(bmax) is a maximal number of information columns in a PCM for a given K and R.

In various other embodiments further constraints may be applied. For example, the lowest m options for Z may be Z≥max (Z_(min), Z_(orig)), wherein Z∈Z_(allowed), and wherein Z_(min) is the minimal possible lift size. In a specific example, m may be equal to 8. Accordingly, there is m different Zs for each coding rate R and each information length K. However, only a single one of these Zs is stored in a memory (e.g., lifting table) for each coding rate R and each information length K.

In the next step, at step 304, at least one lifting function f_(i) is defined for each coding rate R and for each Z∈Z_(allowed). The lifting function f_(i) may be defined as follows:

Each lifting function f_(i) provides a non-negative integer shift value for the child code PCM using the formula: h_(child) ^(j)=f_(i)(h_(base), Z), wherein h_(base) is a non-negative-one shift value of a base code PCM, and h_(child) ^(j) is a resulting shift value of the child code.

For example, lifting function f_(i) may have the following form: h _(child) ^(j) =h _(base) mod 2^([log 2(Z)]) where [x] is the (lower) integral part of x. h _(child) ^(j) J=h _(base) mod Z h _(child) ^(j)=[h _(base) *Z/Z _(max)], where Z _(max) is the lift size of the base PCM. h _(child) ^(h) =h _(base)>>] log₂(Z _(max) /Z)[, where >> is a right binary shift operation (i.e. a>>b=[a/2^(b)]) and]x[ is an upper integral part of x.

In various embodiments, the number of lifting functions n may be equal to 1, which means that a single fixed lifting function is used to derive each child PCM from the set of base ones. However, in alternative embodiments, the number of lifting function n may be larger than 1, e.g., 2, 3, 4, 5, or more.

In a next step, at step 306, a set of labelled base PCMs all describing one protograph (base graph) is determined. The set of labelled base PCMs is determined for each coding rate R and each Z∈Z_(allowed). The labelled base PCMs may be defined as follows base(R, Z)={PCM₁, PCM₂, . . . , PCM_(t)}. These labelled base PCMs correspond to the lowest code (e.g., the code with the highest overhead).

For example, base(R, Z) may be a set of all available labelled versions of the base graph or protograph. In another example, base(R, Z) may comprise or consist of a single PCM which is deterministically defined by a value K (using some function or a table).

In another example, base(R, Z) may comprise or consist of a single PCM which is deterministically defined by a lift size Z (using some function or table). Embodiments for construction such a function or table are provided as follows: if all lift or circulant sizes Z have the form of a*2^(s) where a∈{8, 9, . . . , 15}, a PCM M_(a-7) may be assigned to a value Z. For example, if t=8, PCMs M₁, M₂, . . . M₈ are predefined labelled versions of the same base protograph. Alternatively, t may be any other positive integer number, such as for example 2, 3, 4, 5, 6, 7 or 10.

In an embodiment a first base PCM 500 is shown in FIG. 5A. FIGS. 5B-1-5B-2 is a representation of the left columns 502 of this base PCM 500 excluding the columns of the long identity matrix 504. FIG. 6A shows a labelled PCM 600 for a=8 (PCM₀). FIGS. 6B-1-6B-4 is a representation of the left columns 602 of the PCM₀ 600 excluding the columns of the long identity matrix 604. FIG. 7A shows a labelled PCM 700 for a=9 (PCM₁). FIGS. 7B-1-7B-4 is a representation of the left columns 702 of the PCM₁ 700 excluding the columns of the long identity matrix 704. FIG. 8A shows a labelled PCM 800 for a=10 (PCM₂). FIGS. 8B-1-8B-4 is a representation of the left columns 802 of the PCM₁ 800 excluding the columns of the long identity matrix 804. FIG. 9A shows a labelled PCM 900 for a=11 (PCM₃). FIGS. 9B-1-9B-4 is a representation of the left columns 902 of the PCM₃ 900 excluding the columns of the long identity matrix 904. FIG. 10A shows a labelled PCM 1000 for a=12 (PCM₄). FIGS. 10B-1-10B-4 is a representation of the left columns 1002 of the PCM₄ 1000 excluding the columns of the long identity matrix 1004. FIG. 11A shows a labelled PCM 1100 for a=13 (PCM₅). FIGS. 11B-1-11B-4 is a representation of the left columns 1102 of the PCM₅ 1100 excluding the columns of the long identity matrix 1104. FIG. 12A shows a labelled PCM 1200 for a=14 (PCM₆). FIGS. 12B-1-12B-2 is a representation of the left columns 1202 of the PCM₆ 1200 excluding the columns of the long identity matrix 1204. FIG. 13A shows a labelled PCM 1300 for a=15 (PCM₇). FIGS. 13B-1-13B-3 is a representation of the left columns 1302 of the PCM₇ 1300 excluding the columns of the long identity matrix 1304. FIGS. 6A, 6B-1-6B-4, 7A, 7B-1-7B-4, 8A, 8B-1-8B-4, 9A, 9B-1-9B-4, 10A, 10B-1-10B-4, 11A, 11B-1-11B-4, 12A, 12B-1-12B-2, 13A, and 13B-1-13B-3 show labelled PCMs 600, 700, 800, 900, 1000, 1100, 1200, 1300 of the first base PCM 500.

In another embodiment a second base PCM 1400 is shown in FIG. 14A-1-14A-2. FIGS. 14B-1-14B-3 is a representation of the left columns 1402 of this base PCM 1400 excluding the columns of the long identity matrix 1404. FIG. 15A shows a single labelled PCM 1500. FIGS. 15B-1-15B-4 is a representation of the left columns 1502 of the single labelled PCM 1500 excluding the columns of the long identity matrix 1504.

FIG. 16A shows a labelled PCM 1600 for a=8 (PCM₀). FIGS. 16B-1-16B-3 is a representation of the left columns 1602 of the PCM₀ 1600 excluding the columns of the long identity matrix 1604. FIG. 17A shows a labelled PCM 1700 for a=9 (PCM₁). FIGS. 17B-1-17B-3 is a representation of the left columns 1702 of the PCM₁ 1700 excluding the columns of the long identity matrix 1704. FIG. 18A shows a labelled PCM 1800 for a=10 (PCM₂). FIGS. 18B-1-18B-3 is a representation of the left columns 1802 of the PCM₂ 1800 excluding the columns of the long identity matrix 1804. FIG. 19A shows a labelled PCM 1900 for a=11 (PCM₃). FIGS. 19B-1-19B-3 is a representation of the left columns 1902 of the PCM₃ 1900 excluding the columns of the long identity matrix 1904. FIG. 20A shows a labelled PCM 2000 for a=12 (PCM₄). FIGS. 20B-1-20B-3 is a representation of the left columns 2002 of the PCM₄ 2000 excluding the columns of the long identity matrix 2004. FIG. 21A shows a labelled PCM 2100 for a=13 (PCM₅). FIGS. 21B-1-21B-3 is a representation of the left columns 2102 of the PCM₅ 2100 excluding the columns of the long identity matrix 2104. FIG. 22A shows a labelled PCM 2200 for a=14 (PCM₆). FIGS. 22B-1-22B-3 is a representation of the left columns 2202 of the PCM₆ 2200 excluding the columns of the long identity matrix 2204. FIG. 23A shows a labelled PCM 2300 for a=15 (PCM₇). FIG. 23B is a representation of the left columns 2302 of the PCM₇ 2300 excluding the columns of the long identity matrix 2304. FIGS. 16A, 16B-1-16B-3, 17A, 17B-1-17B-3, 18A, 18B-1-18B-3, 19A, 19B-1-19B-3, 20A, 20B-1-20B-3, 21A, 21B-1-21B-3, 22A, 22B-1-22B-3, and 23B-1-23-B3 show labelled PCMs 1600, 1700, 1800, 1900, 2000, 2100, 2200, 2300 of the second base PCM 1400.

In step 308, a single combination of {Z, f_(i), base(R, Z)} is selected for each coding rate R and each information length K. This combination may be identified through simulation by measuring the error correction capabilities of the decoder for each possible combination and selecting the one having the best performance between all options. The result may be stored in a lifting table T which for each pair (R,Z) defines lift size Z (or lift size offset), lifting function f and the index of the PCM used. For each pair (R,Z) a set of selected lift sizes Z may be explored each time. For example, the set of selected lift sizes Z may be 8.

Alternatively, m may be different for different (K,R) pairs. For example, m=8 options are explored for K<=2048 and m=4 are explored for K>2048.

As noted above, a set of lifting functions f₁, f₂, . . . , f_(n) may have only one entry, i.e., one lifting function (i.e. n=1). Alternatively, n>1 functions may be explored. In both cases, different functions may be used for different ranges of K, R or (K,R) pairs.

For every transmission of data the coding rate and the information length may be different. A low coding rate provides good protection (reliability) while a high coding rate does not provide as good protection. If a transmission with a certain coding rate does not go through, the data needs to be retransmitted. Retransmission in this case means that the data is transmitted with a lower coding rate than before but the same information length.

In step 310, the combination is stored for every information length and every code rate in a memory. The combination may be stored in a table (e.g., lifting table), in a list, in a linked list, in a database, in a tree or in any other type of storage device and format.

Accordingly, even though steps 302-310 provide a child PCM for each length K and each coding rate R, dependency on the rate R may be removed for a subsequent retransmission or for each subsequent retransmission.

For example, for each subsequent retransmission only additional parity bits are transmitted (so called IR HARQ). In this case the child PCMs, for starting and for all lower rates, should be nested which means that the lifting method and table should not depend on a coding rate R or be independent of the coding rate R.

At the same time, several different overlapping (or non-overlapping) ranges of rates [R_(low1) . . . R_(up1)], [R_(low2) . . . R_(up2)] etc. may be used so that for each range different rate-independent lifting tables T₁, T₂, . . . etc. are designed using steps 302-310. From this point of view, lift sizes, lifting functions and PCMs indirectly depend on a rate or ta range of rates.

In various embodiments the same set of labelled PCMs may be shared for different ranges of rates. In various other embodiments, different sets of PCMs and even different protographs may be used for different ranges of rates.

The lifting table T may have the form as shown in FIG. 4A. The first column of lifting table T 402 in FIG. 4A is for Z_(orig), the second column is for an index i for a specific lift size Z_(i), the third column is for an index j for a specific lifting function f_(j) and the fourth column is for an index t for a specific labelled PCM, PCM_(t).

FIG. 4B shows a lifting table T 404 wherein the index i of the lift size Z in the second column is replaced by the lifting size Z so that the entries show the actual lift size.

FIG. 4C shows a lifting table T 406 for only one lifting function f so that the third column can be removed.

FIGS. 5A-5B show an example of a first multi label QC LDPC base Code 500 and FIGS. 6A, 6B, 7A, 7B, 8A, 8B, 9A, 9B, 10A, 10B, 11A, 11B, 12A, 12B-1-12B-2, 13A, and 13B-1-13B-3 show first labelled QC LDPC codes 600, 700, 800, 900, 1000, 1100, 1200, 1300.

FIGS. 14A-1-14A-2 and 14B-1-14B-3 show an example of a second multi label QC LDPC base Code 1400 and FIGS. 15A, 15B-1-15-3, 16A, 16B-1-16B-3, 17A, 17B-1-17B-3, 18A, 18B-1-18B-3, 19A, 19B-1-19B-3, 20A, 20B-1-20B-3, 21A, 21B-1-21B-3, 22A, 22B-1-22B-3, 23A, and 23B-1-23B-3 show second labelled LDPC codes 1500, 1600, 1700, 1800, 1900, 2000, 2100, 2200, 2300.

FIGS. 24A-1-24A-6, 24B-1-24B-3, 24C-1-24C-6, and 24D-1-24D-6 show lifting tables T 2402, 2404, 2406, 2408. The lifting table T1 2402 of FIG. 24A may be used for coding rates ⅓≤R≤ 8/9 and information length 640≤K≤8192 when K_(bmax)=22. The index i=0, . . . , 7 identifies the allowed Zs. The lifting table T2 2404 of FIG. 24B may be used for coding rates ⅕≤R≤⅔ and information length 40≤K≤2560 when K_(bmax)=16. The index i=0, . . . , 7 identifies the allowed Zs. FIGS. 24A-1-24A-6 and 24B-1-24B-3 show lifting tables of the first code. FIGS. 24C-1-24C-6 and 24D-1-24D-6 show lifting tables 2406, 2408 of the second code.

FIGS. 25A and 25C show the performance 702, 706 of a decoder for applying lifting tables T1 and T2 and for different coding rates R. FIGS. 25B and 25D show related graphs 704, 706 without the implementation of embodiments of the disclosure. As can be seen from comparing FIGS. 25A and 25B, and FIGS. 25C and 25D, embodiments of the disclosure show smooth graphs. In particular, no peaks or spikes can be seen in these smooth graphs showing the excellent performance of the codes using the tables T1 and T2 for a wide range of information length K.

FIG. 26 is a block diagram of an embodiment of a LPDC encoder 2600. LPDC encoder 2600 includes a read-only memory 2602 where the base PCMs 2606 and one or more lifting tables T 2608, 2610, 2612 are stored, I/O memory 2614, and a parity bit processor/generator 2616. The encoder 2600 receives a K-bit input source word and generates an N-bit output code word. The I/O memory 2614 stores the input K-bit information word and is used by the encoder 2600 to generate the K-bit output. The read-only memory 2602 stores base code lift shift values and the lifting table 2608, 2610, 2612. In an embodiment, the lifting functions are implemented in hardware and are not stored in memory. The lifting table 2608, 2610, 2612 may comprise one of the lifting tables shown in FIGS. 4A-4C or FIGS. 6A-6B. The parity bit processor/generator 2616 generates an N-bit output code word according to the K-bit input using appropriate LDPC encoding method, using the child PCM generated on the fly from one of the base PCMs 2606 (or a generator matrix corresponding to this child PCM). This child PCM generation is done by producing offset values of the child code, for each non-zero circulant of the base PCM 2606, by selecting one of the lift size offset values and/or allowed lift sizes, and using this lift size offset and one of the lifting functions or a set of functions corresponding to selected indices in the lifting table 2608, 2610, 2612 that are appropriate for the given size, K, of the input. The N-bit output is then stored in the I/O memory 2614.

FIG. 27 is a block diagram of an embodiment of a LPDC decoder 2700. The LPDC decoder 2700 includes a read-only memory (ROM) 2702 for storing base PCMs 2706 and the one or more lifting tables T2708, 2710, 2712, I/O memory 2714, and a check node processor 2716. The decoder 2700 receives an input LLR (log likelihood ratio) sequence of length N and generates a K-bit output. The read-only memory 2702 stores lift shift values of the base PCMs 2706 and the lifting table(s) 2708, 2710, 2712. The lifting table 2708, 2710, 2712 includes indices of lift size offsets and/or allowed circulant sizes, and indices corresponding to a lifting function. The I/O memory 2714 stores the input vector of length N of LLR values and is used by the check node processor 2716 to generate the K-bit output. The K-bit output is then stored in the I/O memory 2714. The check node processor 2716 generates a K-bit output information bit sequence according to the received N-component input, using a child PCM generated on the fly from one of the base PCMs 2706 by producing, for each non-zero circulant of the base PCM 2706, shift values of the child code from the base code shift value by selecting one of the circulant offset values and/or allowed circulant size and applying to it a lifting function or functions corresponding to selected indices in one of the lifting tables 2708, 2710, 2712.

FIG. 28 is a flowchart of an embodiment of a method 1000 for encoding data using LDPC, the disclosed lifting tables, and the disclosed lifting functions. The method 2800 includes, at a first step, at step 2802, receiving a K-bit source word. In the next step, at step 2804, the K-bit source word is encoded by an LPDC coder to produce an N-bit code word using the disclosed lifting table and lifting functions. In the next step, at step 2806, the encoder then transmits the N-bit code word.

FIG. 29 is a flowchart of an embodiment of a method 2900 for decoding data using LDPC, the disclosed lifting tables T, and the disclosed lifting functions. The method 2900 includes, in a first step, at 2902, receiving a K-bit source word. In the next step, at step 2904, the N-bit code word is decoded by an LPDC coder to produce a K-bit source word using the disclosed lifting table T and lifting functions. In the next step, at step 2906, the decoder then stores the K-bit source word. The decoder uses the redundancy in the received information sequence in a decoding operation performed by the decoder to correct errors in the received information sequence and produce a decoded information sequence. The decoded information sequence is an estimate of the encoded information sequence from which (an estimate of) the information sequence can be extracted.

FIG. 30 illustrates a block diagram of an embodiment processing system 3000 for performing methods described herein, which may be installed in a host device. As shown, the processing system 3000 includes a processor 3004, a memory 3006, and interfaces 3010-3014, which may (or may not) be arranged as shown in FIG. 30. The processor 3004 may be any component or collection of components adapted to perform computations and/or other processing related tasks, and the memory 3006 may be any component or collection of components adapted to store programming and/or instructions for execution by the processor 3004. In an embodiment, the memory 3006 includes a non-transitory computer readable medium. The interfaces 3010, 3012, 3014 may be any component or collection of components that allow the processing system 3000 to communicate with other devices/components and/or a user. For example, one or more of the interfaces 3010, 3012, 3014 may be adapted to communicate data, control, or management messages from the processor 3004 to applications installed on the host device and/or a remote device. As another example, one or more of the interfaces 3010, 3012, 3014 may be adapted to allow a user or user device (e.g., personal computer (PC), etc.) to interact/communicate with the processing system 3000. The processing system 3000 may include additional components not depicted in FIG. 30, such as long term storage (e.g., non-volatile memory, etc.).

In some embodiments, the processing system 3000 is included in a network device that is accessing, or part otherwise of, a telecommunications network. In one example, the processing system 3000 is in a network-side device in a wireless or wireline telecommunications network, such as a base station, a relay station, a scheduler, a controller, a gateway, a router, an applications server, or any other device in the telecommunications network. In other embodiments, the processing system 3000 is in a user-side device accessing a wireless or wireline telecommunications network, such as a mobile station, a user equipment (UE), a personal computer (PC), a tablet, a wearable communications device (e.g., a smartwatch, etc.), or any other device adapted to access a telecommunications network.

In some embodiments, one or more of the interfaces 3010, 3012, 3014 connects the processing system 3000 to a transceiver adapted to transmit and receive signaling over the telecommunications network.

FIG. 31 illustrates a block diagram of a transceiver 3100 adapted to transmit and receive signaling over a telecommunications network. The transceiver 3100 may be installed in a host device. As shown, the transceiver 3100 includes a network-side interface 3102, a coupler 3104, a transmitter 3106, a receiver 3108, a signal processor 3110, and a device-side interface 3112. The network-side interface 3102 may include any component or collection of components adapted to transmit or receive signaling over a wireless or wireline telecommunications network. The coupler 3104 may include any component or collection of components adapted to facilitate bi-directional communication over the network-side interface 3102. The transmitter 3106 may include any component or collection of components (e.g., up-converter, power amplifier, etc.) adapted to convert a baseband signal into a modulated carrier signal suitable for transmission over the network-side interface 3102. The receiver 3108 may include any component or collection of components (e.g., down-converter, low noise amplifier, etc.) adapted to convert a carrier signal received over the network-side interface 3102 into a baseband signal. The signal processor 3110 may include any component or collection of components adapted to convert a baseband signal into a data signal suitable for communication over the device-side interface(s) 3112, or vice-versa. The device-side interface(s) 3112 may include any component or collection of components adapted to communicate data-signals between the signal processor 3110 and components within the host device (e.g., the processing system 800, local area network (LAN) ports, etc.).

The transceiver 3100 may transmit and receive signaling over any type of communications medium. In some embodiments, the transceiver 3100 transmits and receives signaling over a wireless medium. For example, the transceiver 3100 may be a wireless transceiver adapted to communicate in accordance with a wireless telecommunications protocol, such as a cellular protocol (e.g., long-term evolution (LTE), etc.), a wireless local area network (WLAN) protocol (e.g., Wi-Fi, etc.), or any other type of wireless protocol (e.g., Bluetooth, near field communication (NFC), etc.). In such embodiments, the network-side interface 3102 includes one or more antenna/radiating elements. For example, the network-side interface 3102 may include a single antenna, multiple separate antennas, or a multi-antenna array configured for multi-layer communication, e.g., single input multiple output (SIMO), multiple input single output (MISO), multiple input multiple output (MIMO), etc. In other embodiments, the transceiver 3100 transmits and receives signaling over a wireline medium, e.g., twisted-pair cable, coaxial cable, optical fiber, etc. Specific processing systems and/or transceivers may utilize all of the components shown, or only a subset of the components, and levels of integration may vary from device to device.

FIG. 32 illustrates an embodiment network 3200 for communicating data in which the disclosed methods and systems may be implemented. The network 3200 includes a plurality of network components. The network components may include an access point (AP), a station (STA) (e.g., a wireless device or user equipment (UE) such as a wireless phone, etc.), or any other wireless reception point. In an embodiment, the network 3200 includes an access point (AP) 3210 having a coverage area 3212, a plurality of STAs 3220, and a backhaul network 3230. In an embodiment, the AP may be implemented as transceiver 3100 shown in FIG. 31. In an embodiment, the STAs 3220 may be implemented as, for example, processing system 3000 shown in FIG. 30. As used herein, the term AP may also be referred to as a transmission point (TP) and the two terms may be used interchangeably throughout this disclosure. In various embodiments, the AP 3210 may be a base station (BS) also referred to as a base transceiver station (BTS). Examples of a BS include an e Node B (eNB), a gNB, and the like. In an embodiment, the AP 3210 may be a wireless router. Thus, the AP 3210 may include any component capable of providing wireless access by, inter alia, establishing uplink (dashed line) and/or downlink (dotted line) connections with the STAs 3220. The STAs 3220 may include any component capable of establishing a wireless connection with the AP 3210. Examples of STAs 3220 include mobile phones, tablet computers, and laptop computers. The backhaul network 3230 may be any component or collection of components that allow data to be exchanged between the AP 3210 and a remote end (not shown). In some embodiments, the network 3200 may include various other wireless devices, such as relays, femtocells, etc.

It should be appreciated that one or more steps of the embodiment methods provided herein may be performed by corresponding units or modules. For example, a signal may be transmitted by a transmitting unit or a transmitting module. A signal may be received by a receiving unit or a receiving module. A signal may be processed by a processing unit or a processing module. Other steps may be performed by an iterating unit/module, a difference unit/module, an adjustment unit/module, a generating unit/module, a calculating unit/module, an assigning unit/module, an incrementing unit/module, a decrementing unit/module, and/or a setting unit/module. The respective units/modules may be hardware, software, or a combination thereof. For instance, one or more of the units/modules may be an integrated circuit, such as field programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs).

In an embodiment, a method for lifting a child code from a base code for encoding and decoding data includes determining a single combination of a circulant size, a lifting function, and a labelled base matrix PCM according to an information length and a code rate using data stored in a lifting table. The lifting table was defined at a code generation stage. The method also includes calculating a plurality of shifts for the child code. Each shift is calculated by applying the lifting function to the labelled base matrix PCM with a defined index using the circulant size. The method also includes using the derived child PCM to encode or decode data. The method also includes deriving a child PCM according to the single combination of the circulant size, the lifting function, and the labeled PCM and according to one of the plurality of shifts for the child code. The method also includes using the derived child PCM to encode or decode data.

An embodiment of the disclosure provides a method for generating a code. The method includes determining an allowed subset of lift sizes Z for each coding rate R and each information length K. The method also includes determining at least one lifting functions f_(i) for each code rate R and each allowed Z. The method also includes determining a set of base PCMs describing a single protograph. The base PCMs are based on coding rates R and allowed Zs. The method also includes selecting a single combination of a lift size Z, a lifting function f_(i) and a base PCM_(t). The method also includes storing a circulant size offset and/or a circulant size index, a lifting function index, and a base code index corresponding to the single combination for each information length and each coding rate.

An embodiment of the disclosure provides a method for operating a device at a transmitting side. The method includes encoding, at an encoder, information bits into code word. The method also includes transmitting, at a transmitter, signals to a receiving side. The signals including the code words. The information bits are encoded using a plurality of labelled base PCMs. The labelled base PCMs are derived from a single base PCM describing a single protograph.

An embodiment of the disclosure provides a method for operating a device at a receiving side. The method includes receiving, at a receiver, signals from a transmitting side. The signals include a code words. The method also includes decoding, at a decoder, the code words by applying extracting information bits. The information bits are decoded using a plurality of labelled base PCMs. The labelled base PCMs are derived from a single base PCM describing a single protograph.

In an embodiment, an encoder or decoder includes a processor and a computer readable storage medium storing programming for execution by the processor. The programming includes instructions to determine a single combination of a circulant size, a lifting function and a labelled PCM according to an information length and a code rate using data stored in a lifting table which was defined at a code generation stage. The programming also includes instructions to calculate a plurality of shifts for the child code, wherein each shift is calculated by applying the lifting function to the labelled PCM with a defined index using the circulant size. The programming also includes instructions to derive a child PCM according to the single combination of the circulant size, the lifting function, and the labeled PCM and according to one of the plurality of shifts for the child code. The programming also includes instructions to use the derived child PCM to encode or decode data.

In one or more aspects of the disclosure, shifts of non-zero circulants for predefined positions are unchanged.

In one or more aspects of the disclosure, the labelled PCM is derived from a base code, and wherein the base code is represented by the PCM shown in FIGS. 5A and 5A1.

In one or more aspects of the disclosure, the labelled PCM is derived from a base code, and wherein the base code is represented by the PCM shown in FIGS. 5K and 5K1.

In one or more aspects of the disclosure, the labelled PCM is a labelled PCM represented by one of PCM0-PCM7 shown in FIGS. 5B-5I1.

In one or more aspects of the disclosure, the labelled PCM is a labelled PCM represented by one of PCM0-PCM7 shown in FIGS. 5M-5T1.

In one or more aspects of the disclosure, the labelled PCMs is a labelled PCM shown in FIGS. 5L-5L1.

In one or more aspects of the disclosure, the lifting function is selected from a single lifting function.

In one or more aspects of the disclosure, the lifting function is selected from a plurality of lifting functions.

In one or more aspects of the disclosure, the labelled base matrix PCM is directly derived from the circulant size.

In one or more aspects of the disclosure, the circulant size is Z, where Z=a*2{circumflex over ( )}s.

In one or more aspects of the disclosure, the lifting function provides a code shift value.

In an embodiment, a method for generating a code for encoding or decoding data includes determining a subset of allowed lift sizes Z for each coding rate R and each information length K. The method also includes determining at least one lifting functions fi for each code rate R and each Z of the subset of the allowed lift sizes Z. The method also includes determining a set of labelled PCMs describing a single protograph. The labelled PCMs are based on coding rates R and the subset of allowed lift sizes Z. The method also includes selecting a single combination of a lift size Z, a lifting function f, and a labelled PCMt. The method also includes storing a circulant size offset and/or a circulant size index, a lifting function index, and a labelled PCM index corresponding to the single combination for each information length and each coding rate.

In one or more aspects of the disclosure, the set of labelled PCMs describing the single protograph is based on the PCM shown in FIGS. 5A and 5A1.

In one or more aspects of the disclosure, the set of labelled PCMs describing the single protograph is based on the PCM shown in FIGS. 5K and 5K1.

In one or more aspects of the disclosure, the lifting function is selected from a single lifting function.

In an embodiment, a method for operating a device at a transmitting side includes encoding, at an encoder, information bits into code word. The method also includes transmitting, at a transmitter, signals to a receiving side. The signals include the code words. The information bits are encoded using a plurality of labelled base PCMs. The labelled base PCMs are derived from a single base PCM describing a single protograph.

In one or more aspects of the disclosure, the information bits have different bit lengths and are encoded with different coding rates.

In one or more aspects of the disclosure, a labelled base PCM is selected according to a coding rate.

In one or more aspects of the disclosure, encoding includes switching from a first labelled PCM to a second labelled PCM when the coding rate changes from a first coding rate to a second coding rate.

In one or more aspects of the disclosure, encoding includes switching from a first labelled PCM to a second labelled PCM when the lift size changes from a first lift size to a second lift size, the first and second lift sizes being dependent on different information bit lengths.

In one or more aspects of the disclosure, encoding information bits into code words includes encoding information bits into code words according to the lifting table shown in FIG. 6A, wherein an index a represents a labelled base PCM, wherein Z represents the lift size, and wherein Z is dependent from information bit length.

In one or more aspects of the disclosure, encoding information bits into code words includes encoding information bits into code words according to the lifting table shown in FIG. 6B, wherein an index a represents a labelled base PCM, and wherein Z represents the lift size.

In one or more aspects of the disclosure, encoding information bits into code words includes encoding information bits into code words according to the lifting table shown in FIG. 6C, wherein an index a represents a labelled base PCM, and wherein Z represents the lift size.

In one or more aspects of the disclosure, encoding information bits into code words includes encoding information bits into code words according to the lifting table shown in FIG. 6D, wherein an index a represents a labelled base PCM, and wherein Z represents the lift size.

In one or more aspects of the disclosure, the base PCM is represented by the PCM shown in FIGS. 5A and 5A1.

In one or more aspects of the disclosure, the base PCM is represented by the PCM shown in FIGS. 5K and 5K.

In an embodiment, a method for operating a device at a receiving side includes receiving, at a receiver, signals from a transmitting side, the signals including a code word. The method also includes decoding, at a decoder, the code words by applying extracting information bits. The information bits are decoded using a plurality of labelled base PCMs. The labelled base PCMs are derived from a single base PCM describing a single protograph.

In one or more aspects of the disclosure, the information bits have different bit lengths and are decoded with different coding rates.

In one or more aspects of the disclosure, a labelled base PCM is selected according to a coding rate.

In one or more aspects of the disclosure, decoding comprises switching from a first labelled PCM to a second labelled PCM when the coding rate changes from a first coding rate to a second coding rate.

In one or more aspects of the disclosure, decoding includes switching from a first labelled PCM to a second labelled PCM when the lift size changes from a first lift size to a second lift size, the first and second lift sizes being dependent on different information bit lengths.

In one or more aspects of the disclosure, encoding code words into information bits includes decoding code words into information bits according to the lifting table shown in FIG. 6A, wherein an index a represents a labelled base PCM, wherein Z represents the lift size, and wherein Z is dependent from information bit length.

In one or more aspects of the disclosure, decoding code words into information bits includes decoding code words into information bits according to the lifting table shown in FIG. 6B, wherein an index a represents a labelled base PCM, and wherein Z represents the lift size.

In one or more aspects of the disclosure, decoding code words into information bits includes decoding code words into information bits according to the lifting table shown in FIG. 6C, wherein an index a represents a labelled base PCM, and wherein Z represents the lift size.

In one or more aspects of the disclosure, decoding code words into information bits includes decoding code words into information bits according to the lifting table shown in FIG. 6D, wherein an index a represents a labelled base PCM, and wherein Z represents the lift size.

In one or more aspects of the disclosure, the base PCM is represented by the PCM shown in FIGS. 5A and 5A1.

In one or more aspects of the disclosure, the base PCM is represented by the PCM shown in FIGS. 5K and 5K1.

In an embodiment, an encoder or decoder includes a processor and a computer readable storage medium storing programming for execution by the processor. The programming includes instructions to determine a single combination of a circulant size, a lifting function and a labelled PCM according to an information length and a code rate using data stored in a lifting table which was defined at a code generation stage. The programming also includes instructions to calculate a plurality of shifts for the child code, wherein each shift is calculated by applying the lifting function to the labelled PCM with a defined index using the circulant size. The programming also includes instructions to use the derived child PCM to encode or decode data.

The content of the following references are incorporated herein by reference as if reproduced in their entirety:

-   -   Provisional Application No. 62/454,416 (HW 85338016 US01) titled         OFFSET LIFTING METHOD and filed Feb. 3, 2017     -   U.S. patent application Ser. No. 15/887,148 (HW 85338016 US02)         titled OFFSET LIFTING METHOD and filed Feb. 2, 2018

While this disclosure has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the disclosure, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments. 

What is claimed is:
 1. A method for lifting a child code from a base code for encoding and decoding data, the method comprising: determining a single combination of a circulant size, a lifting function, and a labelled base Parity Check Matrix (PCM) according to an information length and a code rate using a set index and sets of lifting sizes stored in a lifting table defined at a code generation stage; calculating a plurality of shifts for a child code, wherein each shift is calculated by applying the lifting function to the labelled base PCM with a defined set index using the circulant size; deriving a child PCM according to the single combination of the circulant size, the lifting function, and the labeled PCM and according to one of the plurality of shifts for the child code; and using the derived child PCM to encode or decode data.
 2. The method of claim 1, wherein shifts of non-zero circulants for predefined positions are unchanged.
 3. The method of claim 1, wherein the lifting function is selected from a single lifting function.
 4. The method of claim 1, wherein the lifting function is selected from a plurality of lifting functions.
 5. The method of claim 1, wherein the labelled base PCM is directly derived from the circulant size.
 6. The method of claim 5, wherein the circulant size is Z, wherein Z=a*2{circumflex over ( )}s.
 7. The method of claim 1, wherein the lifting function provides a code shift value.
 8. A method for generating a code for encoding or decoding data, the method comprising: determining a subset of allowed lift sizes Z for each coding rate R and each information length K; determining at least one lifting functions fi for each code rate R and each Z of the subset of the allowed lift sizes Z; determining a set of labelled Parity Check Matrixes (PCMs) describing a single protograph, wherein the labelled PCMs are based on coding rates R and the subset of allowed lift sizes Z; selecting a single combination of a lift size Z, a lifting function f and a labelled PCM; and storing a circulant size offset and/or a circulant size index, a lifting function index and a labelled PCM index corresponding to the single combination for each information length and each coding rate.
 9. The method of claim 8, wherein the lifting function is selected from a single lifting function.
 10. An encoder comprising: a processor; a computer readable storage medium storing programming for execution by the processor, the programming including instructions to: determine a single combination of a circulant size, a lifting function and a labelled Parity Check Matrix (PCM) according to an information length and a code rate using a set index and sets of lifting sizes stored in a lifting table which was defined at a code generation stage; calculate a plurality of shifts for a child code, wherein each shift is calculated by applying the lifting function to the labelled PCM with a defined set index using the circulant size; derive a child PCM according to the single combination of the circulant size, the lifting function, and the labeled PCM and according to one of the plurality of shifts for the child code; and use the derived child PCM to encode data.
 11. The encoder of claim 10, wherein shifts of non-zero circulants for predefined positions are unchanged.
 12. The encoder of claim 10, wherein the lifting function is selected from a single lifting function.
 13. The encoder of claim 10, wherein the lifting function is selected from a plurality of lifting functions.
 14. The encoder of claim 10, wherein the labelled PCM is directly derived from the circulant size.
 15. The encoder of claim 14, wherein the circulant size is Z, wherein Z=a*2{circumflex over ( )}s.
 16. The encoder of claim 10, wherein the lifting function provides a code shift value.
 17. An apparatus comprising: a processor; a computer readable storage medium storing programming for execution by the processor, the programming including instructions to: determine a subset of allowed lift sizes Z for each coding rate R and each information length K; determine at least one lifting functions fi for each code rate R and each Z of the subset of the allowed lift sizes Z; determine a set of labelled Parity Check Matrixes (PCMs) describing a single protograph, wherein the labelled PCMs are based on coding rates R and the subset of allowed lift sizes Z; select a single combination of a lift size Z, a lifting function f and a labelled PCM; and store a circulant size offset and/or a circulant size index, a lifting function index and a labelled PCM index corresponding to the single combination for each information length and each coding rate.
 18. The apparatus of claim 17, wherein the lifting function is selected from a single lifting function.
 19. The apparatus of claim 17, wherein the lifting function is selected from a plurality of lifting functions.
 20. The apparatus of claim 17, wherein the lifting function provides a code shift value. 